dts: stm32: add missing pinctrl description dts files ...

Packages AB and AD pinctrl files were missing for STM32MP15x platforms.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Change-Id: I84982677f93d6e01a9c3f4b62f9cb2f1a1988543

plat-stm32mp1: calibration: don't panic if frequency is out of range ...

After calibration just display message if frequency of "LSI" or "HSI"
is still out of range.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Change-Id: I979f5483029b9022e22a538ca6d2e1fa9466127f
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/321220
ACI: CITOOLS <MDG-smet-aci-reviews@list.st.com>
ACI: CIBUILD <MDG-smet-aci-builds@list.st.com>
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Domain-Review: Gatien CHEVALLIER <gatien.chevallier@st.com>

dts: stm32: add iod domain as always on regulator ...

Activate the IO domain as always on regulator in SoC dtsi, to enable
IOCOMP and  deactivate the level detectors in SoC dtsi as it no more
done in SYSCFG driver and PWR driver.

Fixes: a4263eea9782 ("plat-stm32mp1: syscfg: fix IOCOMP for SD1 and SD2")
Fixes: 88d116e0ee5c ("plat-stm32mp1: pwr: remove IO support for SD1 and SD2")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ic20d7de556355d8d1306391ace812a3f86ea2dda
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/315642
Reviewed-by: Pascal PAILLET <p.paillet@st.com>
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Tested-by: Pascal PAILLET <p.paillet@st.com>

drivers: stm32_bsec: fix timeouts initializations ...

If OP-TEE is rescheduled right after the timeouts are initialized in
power_down_safmem() and power_up_safmem(), the timeout might be elapsed
when resuming the function. This would cause the while loop to break
instantly and there will be no delay between configuring the registers
and reading the status.

Initializes the timeout after configuring the registers.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Change-Id: Idd7e9151cdddb1db60e775f5b59ec5b8a1639815
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/312894
ACI: CITOOLS <MDG-smet-aci-reviews@list.st.com>
ACI: CIBUILD <MDG-smet-aci-builds@list.st.com>
Reviewed-by: Etienne CARRIERE <etienne.carriere@foss.st.com>
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Tested-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Domain-Review: Gatien CHEVALLIER <gatien.chevallier@st.com>

plat-stm32mp1: add missing braces in IO compensation function ...

Adds missing braces in stm32mp_syscfg_enable_io_compensation().

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Change-Id: I10962e4c1d37c3ca14b438397a0787b118bc3acb
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/312250
ACI: CITOOLS <MDG-smet-aci-reviews@list.st.com>
ACI: CIBUILD <MDG-smet-aci-builds@list.st.com>
Tested-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Domain-Review: Patrick DELAUNAY <patrick.delaunay@foss.st.com>

drivers: stm32mp1_regulator_iod: fix timeout initializations ...

Fixes timeout initialization to ensure timeout monitoring starts
only once PWR regulator is enabled in stm32mp1 regulator iod driver.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I91228453ed721734f8332305d59a26704c35f124
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/312249
ACI: CITOOLS <MDG-smet-aci-reviews@list.st.com>
ACI: CIBUILD <MDG-smet-aci-builds@list.st.com>
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Reviewed-by: Etienne CARRIERE <etienne.carriere@foss.st.com>

plat-stm32mp1: fix timeout initializations ...

Fixes timeout initialization to ensure timeout monitoring starts
only once PWR regulator is enabled in stm32mp1_pwr driver and
once IO compensation is enabled in stm32mp1_syscfg driver.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ie3c5f5a3e2f7de7e876c9295f212d0f1a97125f1
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/312248
ACI: CITOOLS <MDG-smet-aci-reviews@list.st.com>
ACI: CIBUILD <MDG-smet-aci-builds@list.st.com>
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>

drivers: stm32_gpio: nicely test DT property before using it ...

Checks awaited property is found and explicitly panic if another
error than FDT_ERR_NOTFOUND is reported. The issue was reported
by Coverity.

Error (null_pointer_dereference_crash return_value)
core/drivers/stm32_gpio.c:_fdt_stm32_gpio_controller
  line 675: Condition `*res`, taking false branch.
  line 676: End of if statement.
  line 679: Condition `!bank`, taking false branch.
  line 682: End of if statement.
  line 691: Condition `pa == 4294967295UL /* (paddr_t)-1 */`, taking false branch.
  line 692: End of if statement.
  line 697: Condition `blen == 4294967295U /* (size_t)-1 */`, taking false branch.
  line 698: End of if statement.
  line 703: Condition `!cuint`, taking false branch.
  line 703: Condition `len != dt_name_len + 1`, taking false branch.
  line 704: End of if statement.
  line 706: Condition `strncmp((char const *)cuint, "GPIOA", dt_name_len - 1) != 0`, taking false branch.
  line 708: End of if statement.
  line 713: Condition `bank->sec_support`, taking true branch.
  line 717: Condition `cuint`, taking false branch.
  line 720: Reached else branch.
  line 722: Falling through to end of if statement.
  line 724: End of if statement.
  line 727: `fdt_getprop` returns `NULL` (checked 106 out of 110 times).
core/arch/arm/kernel/boot.c
  line 1029: Example 1: Assigning: `prop` = return value from `fdt_getprop(fdt, offs, "reg", &len)`.
core/arch/arm/kernel/boot.c
  line 1030: Example 1 (cont.): `prop` has its value checked in `prop`.
core/arch/arm/plat-stm32mp1/cpu_opp.c
  line 225: Example 2: Assigning: `cuint32` = return value from `fdt_getprop(fdt, subnode, "opp-supported-hw", NULL)`.
core/arch/arm/plat-stm32mp1/cpu_opp.c
  line 227: Example 2 (cont.): `cuint32` has its value checked in `cuint32`.
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_calib.c
  line 426: Example 3: Assigning: `cuint` = return value from `fdt_getprop(fdt, node, "counter", NULL)`.
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_calib.c
  line 427: Example 3 (cont.): `cuint` has its value checked in `cuint`.
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_pmic.c
  line 166: Example 4: Assigning: `cuint` = return value from `fdt_getprop(fdt, pmic_node, "reg", NULL)`.
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_pmic.c
  line 167: Example 4 (cont.): `cuint` has its value checked in `cuint`.
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_pwr.c
  line 217: Example 5: `fdt_getprop(fdt, node, "st,vbat-charge-1K5", NULL)` has its value checked in `fdt_getprop(fdt, node, "st,vbat-charge-1K5", NULL)`.
  line 727: Assigning: `cuint` = `NULL` return value from `fdt_getprop`.
  line 729: Condition `len % 4 != 0`, taking false branch.
  line 730: End of if statement.
  line 733: Condition `i < len / 4`, taking true branch.
  line 734: Dereferencing `cuint`, which is known to be `NULL`.

Change-Id: I04e8fc0ea56e229e556be7e3d090e705cf917df4
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/299164
ACI: CITOOLS <MDG-smet-aci-reviews@list.st.com>
ACI: CIBUILD <MDG-smet-aci-builds@list.st.com>
Reviewed-by: Etienne CARRIERE <etienne.carriere@foss.st.com>
Reviewed-by: Antonio Maria BORNEO <antonio.borneo@foss.st.com>
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Tested-by: Etienne CARRIERE <etienne.carriere@foss.st.com>
Domain-Review: Gatien CHEVALLIER <gatien.chevallier@st.com>

drivers: stm32_rng: fix case when RNG is not ready ...

Checks RNG data ready status bit before each read of a 32bit
sample from the RNG FIFO. Indeed the data ready status bit tells that
the RNG FIFO contains random bytes by burst of 32bit word,
not by burst of 4 32bit words.

Change-Id: Id12162d9c405b9574559568fa90f48f9afa7d1bb
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/308107
ACI: CITOOLS <MDG-smet-aci-reviews@list.st.com>
ACI: CIBUILD <MDG-smet-aci-builds@list.st.com>
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Tested-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Domain-Review: Gatien CHEVALLIER <gatien.chevallier@st.com>

plat-stm32mp1: enable fixed clock in stm32mp15 ...

Enable fixed clock in stm32mp15 that is needed by the platform clock
driver.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Change-Id: Iea48e1bfbd5ca2df389dce30a128cb66417d0eee
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/306267
ACI: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Domain-Review: Patrick DELAUNAY <patrick.delaunay@foss.st.com>

clk: stm32mp13: fix of CKPER clock disabling ...

The mask used to configure the CKPER MUX disabled was wrong and
unnecessary.

Change-Id: I4be84f413b5f5e99cfd44182a8555f5e603788c4
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/306266
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
ACI: CIBUILD <MDG-smet-aci-builds@list.st.com>
ACI: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Domain-Review: Patrick DELAUNAY <patrick.delaunay@foss.st.com>

plat-stm32mp1: map DDR bottom page for STM32MP13 as well ...

The first page of the DDR, where the training area backup data will be
stored must be mapped as non-secure memory

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Change-Id: I1adb4d2d54aeb761938f414ea6ab78ff3199dbc1
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/308680
Tested-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Domain-Review: Gatien CHEVALLIER <gatien.chevallier@st.com>
ACI: CIBUILD <MDG-smet-aci-builds@list.st.com>
ACI: CITOOLS <MDG-smet-aci-reviews@list.st.com>

plat-stm32mp1: pm: save_ddr_training_area() in all cases ...

Saving DDR training are should not depend on CFG_STM32MP1_OPTEE_IN_SYSRAM
because TF-A does not save it but restores it.

Add an assert on va when saving DDR training area to check if it's not
NULL.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Change-Id: Ia39d60fbdbe45a89241e53a7013d2951c91aff0b
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/308595
ACI: CITOOLS <MDG-smet-aci-reviews@list.st.com>
ACI: CIBUILD <MDG-smet-aci-builds@list.st.com>
Tested-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Domain-Review: Gatien CHEVALLIER <gatien.chevallier@st.com>

plat-stm32mp1: syscfg: avoid to display false IO compensation error ...

In case of timeout expires, check again IO compensation bit to avoid to
display a false error message.

Change-Id: I82035ecafc011310567d216a05301a21c09ebd42
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/308392
Tested-by: Christophe KERELLO <christophe.kerello@st.com>
Reviewed-by: Christophe KERELLO <christophe.kerello@st.com>
Reviewed-by: Etienne CARRIERE <etienne.carriere@foss.st.com>
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
ACI: CITOOLS <MDG-smet-aci-reviews@list.st.com>
ACI: CIBUILD <MDG-smet-aci-builds@list.st.com>
Domain-Review: Patrick DELAUNAY <patrick.delaunay@foss.st.com>

plat-stm32mp1: do not discriminate how CFG_TZDRAM_START is set ...

Remove useless discrimination on CFG_TZDRAM_START value regarding the
platform flavor and its default value for STM32MP15 boards.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Change-Id: I83c29d6b2d7c9550020ee58ca809cb84ae9c5891
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/307055
Tested-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
ACI: CITOOLS <MDG-smet-aci-reviews@list.st.com>
ACI: CIBUILD <MDG-smet-aci-builds@list.st.com>
Reviewed-by: Etienne CARRIERE <etienne.carriere@foss.st.com>
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Domain-Review: Gatien CHEVALLIER <gatien.chevallier@st.com>

drivers: stm32_iwdg: don't refresh the watchdog on early interrupt ...

Both the bit to acknowledge the early interrupt and the field to
set the window counter are in the same register.
A write to the window counter's field triggers a watchdog refresh.

To prevent the undesired watchdog refresh while acknowledging the
early interrupt, write protect all the registers. This makes
read-only all the register's fields except the bit to acknowledge
the early interrupt.

While there, add a check for spurious interrupts.

Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
Change-Id: I11c488e4ae0530c30ea44c9aecbda59ad79f360c
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/304614
ACI: CITOOLS <MDG-smet-aci-reviews@list.st.com>
ACI: CIBUILD <MDG-smet-aci-builds@list.st.com>
Tested-by: Antonio Maria BORNEO <antonio.borneo@st.com>
Reviewed-by: Antonio Maria BORNEO <antonio.borneo@st.com>
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Domain-Review: Lionel DEBIEVE <lionel.debieve@foss.st.com>

drivers: scmi-msg: better assert channel validity ...

Prevents segfault using assertions on channel ID validity in
scmi-msg entry functions.

This change prevents report from Coverity:
Error (null_pointer_dereference_crash return_value)
core/drivers/scmi-msg/entry.c:scmi_smt_threaded_entry
  line 131: `plat_scmi_get_channel` returns `NULL` (checked 9 out of 11 times).
core/arch/arm/plat-stm32mp1/scmi_server.c
  line 737: Example 1: Assigning: `chan` = return value from `plat_scmi_get_channel(i)`.
core/arch/arm/plat-stm32mp1/scmi_server.c
  line 739: Example 1 (cont.): `chan` has its value checked in `chan`.
core/drivers/scmi-msg/shm_msg.c
  line 47: Example 2: Assigning: `channel` = return value from `plat_scmi_get_channel(channel_id)`.
core/drivers/scmi-msg/shm_msg.c
  line 52: Example 2 (cont.): `channel` has its value checked in `channel`.
core/drivers/scmi-msg/smt.c
  line 77: Example 3: Assigning: `channel` = return value from `plat_scmi_get_channel(channel_id)`.
core/drivers/scmi-msg/smt.c
  line 78: Example 3 (cont.): `channel` has its value checked in `channel`.
core/include/drivers/scmi-msg.h
  line 161: Example 4: `plat_scmi_get_channel(channel_id)` has its value checked in `plat_scmi_get_channel(channel_id)`.
core/pta/scmi.c
  line 236: Example 5: Assigning: `channel` = return value from `plat_scmi_get_channel(channel_id)`.
core/pta/scmi.c
  line 237: Example 5 (cont.): `channel` has its value checked in `channel`.
  line 131: Dereferencing `plat_scmi_get_channel(channel_id)`, which is known to be `NULL`.

Error (null_pointer_dereference_crash return_value)
core/drivers/scmi-msg/entry.c:scmi_msg_threaded_entry
  line 142: `plat_scmi_get_channel` returns `NULL` (checked 9 out of 11 times).
core/arch/arm/plat-stm32mp1/scmi_server.c
  line 737: Example 1: Assigning: `chan` = return value from `plat_scmi_get_channel(i)`.
core/arch/arm/plat-stm32mp1/scmi_server.c
  line 739: Example 1 (cont.): `chan` has its value checked in `chan`.
core/drivers/scmi-msg/shm_msg.c
  line 47: Example 2: Assigning: `channel` = return value from `plat_scmi_get_channel(channel_id)`.
core/drivers/scmi-msg/shm_msg.c
  line 52: Example 2 (cont.): `channel` has its value checked in `channel`.
core/drivers/scmi-msg/smt.c
  line 77: Example 3: Assigning: `channel` = return value from `plat_scmi_get_channel(channel_id)`.
core/drivers/scmi-msg/smt.c
  line 78: Example 3 (cont.): `channel` has its value checked in `channel`.
core/include/drivers/scmi-msg.h
  line 161: Example 4: `plat_scmi_get_channel(channel_id)` has its value checked in `plat_scmi_get_channel(channel_id)`.
core/pta/scmi.c
  line 236: Example 5: Assigning: `channel` = return value from `plat_scmi_get_channel(channel_id)`.
core/pta/scmi.c
  line 237: Example 5 (cont.): `channel` has its value checked in `channel`.
  line 142: Dereferencing `plat_scmi_get_channel(channel_id)`, which is known to be `NULL`.

Change-Id: Ibc56626098497baa18903c2c5a6f180e1cd6bdde
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/299165
ACI: CIBUILD <MDG-smet-aci-builds@list.st.com>
Tested-by: Etienne CARRIERE <etienne.carriere@foss.st.com>
Reviewed-by: Etienne CARRIERE <etienne.carriere@foss.st.com>
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Domain-Review: Lionel DEBIEVE <lionel.debieve@foss.st.com>

drivers: stm32: prevent coverity warning in state copy ...

Prevents false positive reports from Coverity as the trace message below.
By construction, the issue reported by Coverity cannot happen as an HMAC
context will never have a NULL source key pointer when the source key
size is no NUL.

Coveriy report:
Error (null_pointer_dereference_crash check_then_dereference)
core/drivers/crypto/stm32/hmac.c:do_hmac_copy_state
  line 144: Condition `src->key`, taking false branch.
  line 145: End of if statement.
  line 144: Comparing `src->key` to null implies that `src->key` might be null.
  line 147: Condition `dst->key`, taking true branch.
  line 148: Passing null pointer `src->key` to `memcpy`, which dereferences it. [Note: The source code implementation of the function has been overridden by a builtin model.]

Change-Id: Ifda551f92a8dbbaca847b5ae924c83cf6a2a696d
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/299168
ACI: CITOOLS <MDG-smet-aci-reviews@list.st.com>
ACI: CIBUILD <MDG-smet-aci-builds@list.st.com>
Tested-by: Etienne CARRIERE <etienne.carriere@foss.st.com>
Reviewed-by: Etienne CARRIERE <etienne.carriere@foss.st.com>
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Domain-Review: Lionel DEBIEVE <lionel.debieve@foss.st.com>

plat-stm32mp1: tzc400: remove useless test on driver data ...

Removes test on driver data that cannot the NULL by implementation.

Change-Id: Ibbce3caede3926276f4cd439020de1910c87ec5a
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/299167
ACI: CITOOLS <MDG-smet-aci-reviews@list.st.com>
ACI: CIBUILD <MDG-smet-aci-builds@list.st.com>
Tested-by: Etienne CARRIERE <etienne.carriere@foss.st.com>
Reviewed-by: Etienne CARRIERE <etienne.carriere@foss.st.com>
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Domain-Review: Lionel DEBIEVE <lionel.debieve@foss.st.com>

plat-stm32mp1: syscfg: simplify disable_io_compensation ...

Simplify disable_io_compensation and remove several register access

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I9332a3cbc9d08040e591e914fac2c803529ee10d
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/304782
Tested-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
ACI: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Domain-Review: Lionel DEBIEVE <lionel.debieve@foss.st.com>
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>

plat-stm32mp1: syscfg: fix IOCOMP for SD1 and SD2 ...

Since the commit 248d85f24a9f ("drivers: regulator: mp13 iod control
io compensation") and the  introduction of IO domain driver for SD1 and
SD2, the IOCOMP is activated with associated regulator and not
directly in the SYSCFG driver, in the init function stm32mp1_iocomp()
which calls stm32mp_syscfg_enable_io_compensation().

Fixes: dc4f0b0680aa ("plat-stm32mp1: update IO compensation sequence")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I4c03315e2a6020873998f20567c1e0f44d6973ac
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/304781
Tested-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Domain-Review: Gatien CHEVALLIER <gatien.chevallier@st.com>

plat-stm32mp1: pwr: remove IO support for SD1 and SD2 ...

Since the commit 4781290df06f ("drivers: regulator: introduce
stm32mp1-regulator-iod") with IO domain driver for SD1 and SD2,
VDD for SD IO is activated with the associated regulators and not
directly in the PWR regulator driver init function
stm32mp1_pwr_regu_probe() which call enable_sd_io().

The associated register PWR_CR3 is now managed in
core/drivers/regulator/stm32mp1_regulator_iod.c
and these function can be removed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ib6364e52f4b38a81350d40da22484b0bfbac09a5
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/305813
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
ACI: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Domain-Review: Gatien CHEVALLIER <gatien.chevallier@st.com>

plat-stm32mp1: syscfg: remove unused API ...

The API stm32mp_syscfg_enable/disable_io_comp() and
stm32mp_syscfg_enable/disable_io_compensation() are never used,
they can remove to simplify the syscfg driver.

Remove stm32mp1_iocomp() to directly call
stm32mp_syscfg_enable_io_compensation(), which now returns a TEE_Result.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Change-Id: I63a7752b90d259da6d643af97ff875d98f065692
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/304780
Tested-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Domain-Review: Lionel DEBIEVE <lionel.debieve@foss.st.com>
ACI: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>

plat-stm32mp1: tzc violation does not always lead to panic() ...

Changes tzc_it_handler() to dump non-secure world CPU registers
only when the platform panics.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Change-Id: Ia89c3a589bee4fd1585ca8129a0e50b719a02446
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/300271
Tested-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
ACI: CITOOLS <MDG-smet-aci-reviews@list.st.com>
ACI: CIBUILD <MDG-smet-aci-builds@list.st.com>
Domain-Review: Lionel DEBIEVE <lionel.debieve@foss.st.com>
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>

plat-stm32mp1: move the initialisation function in the bsec interface ...

Move the static BSEC structure and the interface to access this
static structure in the bsec API.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: Ib560e3829e352254bfb8c792f9cb89b54e534e34
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/247730
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/297446
Tested-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
ACI: CITOOLS <MDG-smet-aci-reviews@list.st.com>
ACI: CIBUILD <MDG-smet-aci-builds@list.st.com>
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Domain-Review: Gatien CHEVALLIER <gatien.chevallier@st.com>

dts: stm32: enable IWDG1 for secure watchdog on STM32MP1x boards ...

Add the IWDG1 to the STM32MP1x board to control the secure
watchdog.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: I683999492bdbfcecde681985fb1bc61690572f4e
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/299721
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>

dts: stm32: add the iwdg1 and iwdg2 on stm32mp131 ...

Add the watchdog IWDG1 and IWDG2 on STM32MP131.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: Idcc36d8d0235af46a3f3b2b116e5d8aab5388812
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/299720
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>

plat-stm32mp1: conf: add the watchdog WDT_SM_HANDLER support ...

Add the configuration to manage the SMC watchdog messages.

Change-Id: Ib6ea8369d2e97ae71a66bef9427b3023311b7b5d
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/299719
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>

drivers: stm32_iwdg: add the init function in wdt_ops ...

Init function is required in case of fast call entry as it
allow the caller to check the timeout supported values.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: I5d7ac5607d3a43e20f4ea773c5fdfb8ff26e4cf9
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/289075
Tested-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Domain-Review: Gatien CHEVALLIER <gatien.chevallier@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/299718
ACI: CITOOLS <MDG-smet-aci-reviews@list.st.com>

drivers: stm32_iwdg: add early interrupt management and compat data ...

Update driver to support early_interrupt management.
Remove non secure watchdog support to only take care about
secure watchdog.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: I2f71fcb756daf29fbae58500a5d327f43ce30b82
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/299717
Tested-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Reviewed-by: Gatien CHEVALLIER <gatien.chevallier@st.com>
Domain-Review: Gatien CHEVALLIER <gatien.chevallier@st.com>